Download or read book Formal Semantics and Proof Techniques for Optimizing VHDL Models written by Kothanda Umamageswaran and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 169 pages. Available in PDF, EPUB and Kindle. Book excerpt: Written expressly for hardware designers, this book presents a formal model of VHDL clearly specifying both the static and dynamic semantics of VHDL. It provides a mathematical framework for representing VHDL constructs and shows how those constructs can be formally manipulated to reason about VHDL.