Hardware Implementation of Error Correcting Codes

Hardware Implementation of Error Correcting Codes
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Total Pages : 252
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ISBN-10 : OCLC:870262996
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Book Synopsis Hardware Implementation of Error Correcting Codes by : Anusha Nandagopal

Download or read book Hardware Implementation of Error Correcting Codes written by Anusha Nandagopal and published by . This book was released on 2013 with total page 252 pages. Available in PDF, EPUB and Kindle. Book excerpt: Error-control coding is a special subject with its own history and arithmetic systems. The theory and usage of error-control codes relate to the protection of digital information against errors that occur during data transmission and storage. Error correction coding attaches redundancy to the data at the system's error correction encoder and uses that redundancy to correct erroneous data at the error correction decoder.This thesis focuses on error correcting codes and the hardware implementation of two error-control codes - Reed-Solomon (RS) codes and Viterbi's algorithm. Prior to emphasizing on these two codes, a brief description of various other types of error correcting schemes is presented. A simple (15, 9) RS code and a (4, 1, 2) convolutional code are taken to elaborate the encoding and decoding processes for these error correcting codes. The primary objective of this thesis is to provide a simple and efficient hardware for reliably transmitting and receiving message bits across a communication channel.


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